PLL IP for TSMC
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25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P
- Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation.
- The Fractional-N PLL loop with 2GHz-4GHz VCO has high phase noise performance and ultra-fine frequency tuning step.
- VCO Sub-band auto select (SAS) system allows to find automatically appropriate sub-band for VCO on locked PLL.
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All Digital Fractional-N RF Frequency Synthesizer PLL in TSMC N6/N7
- Fractional Multiplication with frequencies up to 8GHz
- Extremely low jitter (sub 300fs RMS)
- Small size (< 0.05 sq mm)
- Low Power (< 7mW)
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All Digital Fractional-N PLL for Performance Computing in TSMC N6/N7
- Fractional multiplication with frequency up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 5mW)
- Support for multi-PLL systems
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Low Power All Digital Fractional-N PLL in TSMC N6/N7
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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Low Power All Digital Fractional-N PLL in Samsung 8LPP
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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High Speed 16GHz PLL
- Type II ,3rd order low jitter PLL
- Auto calibration for process and temperature (USP)
- Programmable frequency using CSR registers
- 8/10/16GHz quadrature clocks
- Operating temperature -40 to 125
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Core Powered Wide Range Programmable Integer PLL on TSMC CLN2P
- Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
- Entirely core voltage powered, needs no analog supply voltage
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Very fine precision: near 1 part per billion resolution
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Low Power PLL for TSMC 40nm ULP
- Wide range M, P, and N integer dividers.
- 40MHz – 600MHz output frequency range.
- Input frequency range 1.4MHz – 32MHz.
- 18pS RMS cycle to cycle jitter.
- Lock-detect function.
- Optional bypass function.
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General Purpose PLL for TSMC 152nm
- Wide range M integer divider. (See ot3122 for M, N, and P dividers)
- 40MHz – 800MHz output frequency range.
- Comparable frequency range 8MHz – 32MHz.
- Optional prescaler.
- 19pS RMS cycle to cycle jitter at 800MHz.
- Lock-detect function.
- Bypass function.
- 20µS well defined fast startup behavior.
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PLL for TSMC 130nm LP
- Wide range N, M, P integer dividers.
- 40MHz – 600MHz output frequency range.
- Comparable frequency range 8MHz – 50MHz.
- 18pS RMS cycle to cycle jitter at 400MHz.
- Lock-detect function.
- Bypass function.
- Well defined startup behavior.
- -40°C to 125°C temperature operation.
- Small cell area: 0.022mm2 in 0.13µ CMOS.