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DLL IP for TSMC

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Compare 53 DLL IP for TSMC from 3 vendors (1 - 10)
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  • 28nm
  • Low Voltage, Low Power Fractional-N PLLs
    • Low power, suitable for IoT applications
    • Good jitter, suitable for clocking digital logic.
    • Extremely small die area (< 0.005 sq mm), using a ring oscillator
    • Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
    Block Diagram -- Low Voltage, Low Power Fractional-N PLLs
  • General Purpose Fractional-N PLLs
    • Low power, suitable for logic clocking applications
    • Extremely small die area, using a ring oscillator
    • Twelve bits fractional resolution
    Block Diagram -- General Purpose Fractional-N PLLs
  • High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
    • Fractional-N digital PLL architecture, using an LC-tank oscillator
    Block Diagram -- High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
  • TSMC CLN28HPCLVT 28nm DDR DLL - 180MHz-900MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPCLVT 28nm DDR DLL - 240MHz-1200MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPCLVT 28nm DDR DLL - 379MHz-1895MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPC+LVT 28nm DDR DLL - 195MHz-975MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
  • TSMC CLN28HPC+ 28nm DDR DLL - 165MHz-825MHz
    • Designed for high-speed DDR style interface applications.
    • Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
    • Delays multiple periodic or aperiodic signals independent of voltage and temperature.
    • Delivers optimal jitter performance over a wide frequency range.
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