DLL IP for TSMC
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- 16nm
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Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
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General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
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High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
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TSMC CLN16FF+LLLVT 16nm Multi Phase DLL - 600MHz-3000MHz
- Designed for high-speed interface applications.
- Generates precise multi-phase clocks directly from the reference clock.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LLLVT 16nm Multi Phase DLL - 300MHz-1500MHz
- Designed for high-speed interface applications.
- Generates precise multi-phase clocks directly from the reference clock.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LLLVT 16nm Multi Phase DLL - 1200MHz-6000MHz
- Designed for high-speed interface applications.
- Generates precise multi-phase clocks directly from the reference clock.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LLLVT 16nm DDR DLL - 568MHz-2840MHz
- Designed for high-speed DDR style interface applications.
- Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
- Delays multiple periodic or aperiodic signals independent of voltage and temperature.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LLLVT 16nm DDR DLL - 270MHz-1350MHz
- Designed for high-speed DDR style interface applications.
- Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
- Delays multiple periodic or aperiodic signals independent of voltage and temperature.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LLLVT 16nm DDR DLL - 360MHz-1800MHz
- Designed for high-speed DDR style interface applications.
- Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
- Delays multiple periodic or aperiodic signals independent of voltage and temperature.
- Delivers optimal jitter performance over a wide frequency range.
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TSMC CLN16FF+LL 16nm Multi Phase DLL - 400MHz-2000MHz
- Designed for high-speed interface applications.
- Generates precise multi-phase clocks directly from the reference clock.
- Delivers optimal jitter performance over a wide frequency range.