Memory & Libraries IP for GLOBALFOUNDRIES
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Memory & Libraries IP
for GLOBALFOUNDRIES
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112
Memory & Libraries IP
for GLOBALFOUNDRIES
from 19 vendors
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10)
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MIPI DPHY & LVDS Transmit Combo on GF55LPe
- MIPI D-PHY version 1.2 compliant PHY transmitter
- OpenLDI version 0.9 compliant LVDS transmitter
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Single Rail SRAM GLOBALFOUNDRIES 22FDX
- Single port SRAM compiler based on Racyics® R188 logic memory cell with dual-well architecture
- Supply voltage 0.55 V to 0.8 V enabled with Racyics® ABB
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Dual-Rail SRAM Globalfoundries 22FDX
- Single port SRAM compiler based on P124 bitcell with Dual-supply-rail architecture
- Bitcell array supply voltage 0.8V and ULV core interface down to 0.4V enabled with Racyics' ABB
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LVDS RX & TX IOs in multiple foundry technology
- LVDS TX
- LVDS RX
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A 65nm Wirebond IO library with 2.5V GPIO, LVDS TX & RX and 2.5V analog / RF
- GPIO:
- LVDS TX & RX
- ANALOG / RF
- Physical Attributes
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LVDS IO Pad Set
- Powered from 1.8V ±10% and 1.0V (±10%) to 1.1V (-10%/+5%) core power supplies
- Operates up to 1.2GHz (2.4Gbps)
- Input receive sensitivity of 75mV peak differential (without hysteresis)
- Common mode range from 0V to 2.4V (limited by Power Supply)
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1Kbyte EEPROM IP with configuration 64p8w16bit
- Global Foundries Embedded EEPROM 0.13 um
- 1Kbyte of available memory 16(bit per word) x 8(words per page) x 64(pages) bit
- High density of memory cells
- Writing and erasing data by one high-voltage pulse
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36Kbyte EEPROM IP with configuration 288p32w32bit
- Global Foundries Embedded EEPROM 0.13 um
- 36Kbyte of available memory 32(bit per word) x 32(words per page) x 288(pages) bit
- High density of memory cells
- Writing and erasing data by one high-voltage pulse
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3.6Kbit EEPROM IP with configuration 28p8w16bit
- Global Foundries Embedded EEPROM 0.13 um
- 3.6Kbit of available memory 16(bit per word) × 8(words per page) × 28(pages) bit
- High density of memory cells
- Writing and erasing data by one high-voltage pulse
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1.8V and 3.3V Radiation-Hardened GPIOs with Optimized LDO in GF 12nm LP/LP+
- A radiation-hardened GlobalFoundries 12nm LP/LP+ Flip-Chip IO library with both 1.8V and 3.3V GPIO, fail-safe GPI, analog cell, and associated ESD.
- Also features an LDO optimized for use with 3.3V GPIO.