Single port SRAM Compiler - low power retention mode
Overview
Silicon proven, qualified and in high volume production. Single Port compiler offers the lowest retention power on the market.
Key Features
- Uses low leakage devices and source biasing to minimize standby currents.
- Dedicated standy mode with built in source biasing for the memory array.
- Periphery and array supplies are isolated to allow power off of the perphery when in standy mode.
- .8V supply voltage
Benefits
- Ultra low power.
- Ultra low retention power
- Fast
Applications
- IOT, Mobile,
Deliverables
- Memory compiler which provides all EDA Views:
- GDSII Layout
- Liberty Files
- Behavioral Verilog Model
- Structural Verilog Netlist
- ATPG Verilog fpr TetraMax and FastScan
- Tessent MBist
Technical Specifications
Foundry, Node
GF22FDX
Availability
now
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