Embedded MTP (Multi-Time Programmable) IP, 8Kx8 bits for 1.8V/5V BCD

Overview

NeoMTP is a single-poly embedded memory technology offering high NVM memory density with 1K endurance at the lowest implementation cost to be found in the industry. NeoMTP performs erase operations for max. 512K bits memory density and serves as a true rewritable memory technology up to 5K P/E cycling with zero additional masking layers. NeoMTP technology is equipped with an additional erase gate and is very similar to NeoBit for easy implementation.

Key Features

Logic Embedded IP
Programming with channel hot electron injection, erasing with FN erase
High yield performance
Small IP size
Good retention realibility
Testable

Applications

Automotive
Communications
Consumer Electronics
Data Processing
Industrial and Medical
Military/Civil Aerospace
Others

Deliverables

Data Sheet
Verilog
Synopsys Model
GDS Phantom
Test Methodology

Technical Specifications

Foundry, Node

TSMC 180nm BCD

Maturity

In Production

TSMC

In Production: 180nm , 180nm E , 180nm ELL , 180nm FG , 180nm G , 180nm LP , 180nm LV , 180nm ULL

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