TSMC OIP: Process Status
Last week was TSMC's Open Innovation Platform Innovation Forum (aka OIP). Dave Keller welcomed everyone and then introduced Cliff Hou who gave the update on everything technical. Here's what he said. Or rather, here's what I think he said. I will give my usual caveat at the start of posts like this: TSMC does not allow photography, video, or recording the presentations, and they don't provide the slides. So this is entirely from the notes I took during the presentation.
I realize that this post is fairly dry and dense with numbers and dates, but since TSMC is far and away the largest foundry, these details are important, and they are not available anywhere else. You can try and find out from TSMC's website something specific like when N6 risk production is planned to start...but you will discover the information is not there.
To read the full article, click here
Related Semiconductor IP
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- RAM 8b, 16b, and 32b data widths - TSMC 180nm
- 1.2GHz General Purpose PLL for TSMC 0.18u Processes
- General Purpose PLL for TSMC 180nm
- Integrated Oscillator - TSMC 180n
Related Blogs
- TSMC Technology Symposium: Process Status
- TSMC Financial Status Plus OIP Update!
- TSMC OIP: On the Road to the Silicon Super Chip
- TSMC OIP: What to Do With 20,000 Wafers Per Day