TSMC OIP: What to Do With 20,000 Wafers Per Day
Today it is TSMC's OIP Ecosystem Innovation forum. This is an annual event but is also a semi-annual update on TSMC's processes, investment, volume ramps and more. TSMC have changed the rules for the conference this year: they have published all the presentations by their partners/customers. Tom Quan of TSMC told me that they will also provide a subset of the presentations TSMC gave to open the day.
 
 The semiconductor business is driven by several large markets, the biggest of which is mobile. Fun statistics of the day are that mobile grew 26% from 2014-15 to shipments of 1.9B units. Since there are 4.3B worldwide mobile users, this means that the annual replacement rate is close to 50%. Global mobile traffic is forecast to go up 10X in 5 years from 30EB/yr in 2014 to 292EB/yr in 2019 (EB is exabyte).
To read the full article, click here
Related Semiconductor IP
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
 - 25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P
 - USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
 - TSMC CLN5FF GUCIe LP Die-to-Die PHY
 - Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
 
Related Blogs
- TSMC OIP and the Insatiable Computing Trend!
 - TSMC OIP: Process Status
 - Analog Bits Builds a Road to the Future at TSMC OIP
 - Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design
 
Latest Blogs
- ML-DSA explained: Quantum-Safe digital Signatures for secure embedded Systems
 - Efficiency Defines The Future Of Data Movement
 - Why Standard-Cell Architecture Matters for Adaptable ASIC Designs
 - ML-KEM explained: Quantum-safe Key Exchange for secure embedded Hardware
 - Rivos Collaborates to Complete Secure Provisioning of Integrated OpenTitan Root of Trust During SoC Production