Does RISC-V mean Open Source Processors?

By _Codasip Blog

August 9, 2017

“So, RISC-V is an Open ISA, that means a RISC-V processor core is Open Source”.
This is a statement that I have often heard this year – however, is it true or false?

Before answering this, let’s consider the broader issue of whether open standards automatically mean open source. Open standards are widespread in technology. The communication protocols TCP/IP have been an open standard for decades. In wireless communication, Wi-Fi and Bluetooth are open standards with multiple versions. In IC design, Verilog is an open standard maintained by the IEEE, and a widely used hardware description language. Verilog is used by a variety of commercial and open source simulators. Incisive, Questa, and VCS are examples of well-known commercial simulators supporting Verilog, however Cver is an example of an open source Verilog simulator. Generally, the commercial Verilog simulators are recognized for their high quality and performance.

To read the full article, click here