RISC-V 5th Workshop Highlights
The fifth (Vth?) RISC-V workshop took place this week at Google in Mountain View. This was actually the third workshop this year. Rick O'Connor, the executive director of the RISC-V foundation, opened the meeting. "It's been quite a year," he said, giving the statistics. At the workshop, there were 350 attendees (up over 100 since the workshop in July), who represented 107 companies and 30 universities. There were actually too many people to fit into the lecture theater at Google, and so there was also an overflow room with a video feed.
To read the full article, click here
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
Related Blogs
- Samsung Highlights Work to Bring RISC-V to Tizen
- 400G Task Force, 100G Backplane Project and Other Highlights from IEEE 802.3 Ethernet Standards Meeting
- Highlights from Recent IEEE 802.3 Ethernet Standards Meeting
- USB Type-C Interoperability Workshop - True, Real-Life Validation
Latest Blogs
- Why What Where DIFI and the new version 1.3
- ML-DSA explained: Quantum-Safe digital Signatures for secure embedded Systems
- Efficiency Defines The Future Of Data Movement
- Why Standard-Cell Architecture Matters for Adaptable ASIC Designs
- ML-KEM explained: Quantum-safe Key Exchange for secure embedded Hardware