Interview: Paul van Besouw, Oasys Design Systems
I recently had the opportunity to sit down with Paul van Besouw, CEO of Oasys Design Systems, and interview him on lessons learned from his entrepreneurial efforts at Ambit and Oasys.
To read the full article, click here
Related Semiconductor IP
- Network-on-Chip (NoC)
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- DVB-S2 Demodulator
- UCIe PHY (Die-to-Die) IP
- UCIe-S 64GT/s PHY IP
Related Blogs
- Will Paul Otellini Convince Tim Cook to Fill Intel's Fabs?
- 2025 Outlook with Paul Wells of sureCore
- Is NASA's design opportunity for FPGAs in space vanishing in favor of privatized platforms?
Latest Blogs
- Enabling End-to-End EDA Flow on Arm-Based Compute for Infrastructure Flexibility
- Real PPA improvements from analog IC migration
- Design specification: The cornerstone of an ASIC collaboration
- The importance of ADCs in low-power electrocardiography ASICs
- VESA Adaptive-Sync V2 Operation in DisplayPort VIP