Interview: Paul van Besouw, Oasys Design Systems
I recently had the opportunity to sit down with Paul van Besouw, CEO of Oasys Design Systems, and interview him on lessons learned from his entrepreneurial efforts at Ambit and Oasys.
To read the full article, click here
Related Semiconductor IP
- SLVS Transceiver in TSMC 28nm
- 0.9V/2.5V I/O Library in TSMC 55nm
- 1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
- ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
Related Blogs
- Oasys or Mirage?
- Oasys for FPGA Synthesis? Hmmmm...
- Who should worry about Xilinx and Oasys partnership?
- Will Paul Otellini Convince Tim Cook to Fill Intel's Fabs?
Latest Blogs
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)
- IMG DXT GPU: A Game-Changer for Gaming Smartphones
- Rivos and Canonical partner to deliver scalable RISC-V solutions in Data Centers and enable an enterprise-grade Ubuntu experience across Rivos platforms
- ReRAM-Powered Edge AI: A Game-Changer for Energy Efficiency, Cost, and Security