Interview: Paul van Besouw, Oasys Design Systems
August 12, 2010
I recently had the opportunity to sit down with Paul van Besouw, CEO of Oasys Design Systems, and interview him on lessons learned from his entrepreneurial efforts at Ambit and Oasys.
To read the full article, click here
Related Semiconductor IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
- Neuromorphic Processor IP
- Lossless & Lossy Frame Compression IP
Related Blogs
- Will Paul Otellini Convince Tim Cook to Fill Intel's Fabs?
- 2025 Outlook with Paul Wells of sureCore
- Is NASA's design opportunity for FPGAs in space vanishing in favor of privatized platforms?
Latest Blogs
- MIPS P8700 RISC-V Processor for Advanced Functional Safety Systems
- Boost SoC Flexibility: 4 Design Tips for Memory Subsystems with Combo DDR3/4 Interfaces
- High Bandwidth Memory Evolution from First Generation HBM to the Latest HBM4
- Keeping Pace with CXL Specification Revisions
- Silicon-proven LVTS for 2nm: a new era of accuracy and integration in thermal monitoring