Low-Power Design: Is the Problem Solved?
April 12, 2012
“Once upon a time, you would complain if your cell phone didn’t work on one [battery] charge,” said Qi Wang—Cadence Technical Marketing Group Director for Low-Power Solutions—during his EDPS presentation in Monterey last week. “After Apple introduced the iPhone, your expectation is that the phone might go for a day before needing a recharge.” Why? Because we understand that the phone is now doing a lot more than it once did, said Wang as he entered into the main part of his talk.
We’d like to think that achieving closure on power-consumption goals during the design process is smooth and deterministic. The idealized work curve looks something like this in our heads:
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Complex Digital Up Converter
- Bluetooth Low Energy 6.0 Digital IP
- Verification IP for Ultra Ethernet (UEC)
- MIPI SWI3S Manager Core IP
Related Blogs
- Low-Power IC Design: What Is Required for Verification and Debug?
- Is Design in India on the Upswing?
- Verification of the Lane Adapter FSM of a USB4 Router Design Is Not Simple
- Why thinking about software and security is so important right at the start of an ASIC design
Latest Blogs
- Evolution of CXL PBR Switch in the CXL Fabric
- CNNs and Transformers: Decoding the Titans of AI
- How is RISC-V’s open and customizable design changing embedded systems?
- Imagination GPUs now support Vulkan 1.4 and Android 16
- From "What-If" to "What-Is": Cadence IP Validation for Silicon Platform Success