Logic-compatible Gain Cell eDRAM: A Real Alternative to SRAM
Embedded memories are a key component of IoT SoCs and recent applications such as Neural Network Accelerators. Unfortunately, SRAM based embedded memory has a large footprint which often covers more than 50% of the silicon area and is responsible for more than 50% of the power consumption. Furthermore, 6T SRAM cells are sensitive to variations and limit the potential for voltage scaling. Gain Cell embedded DRAMs (GC-eDRAM) rely on a bit cell that requires only 2-4 transistors with a dynamic storage node. As opposed to conventional DRAM, gain cells are logic compatible and require no additional process steps and can therefore replace SRAM at no additional cost. These memories further provide inherent two-port operation and have no direct leakage path. In this talk, Andreas Burg argues that GC-eDRAM is real replacement for embedded SRAM, providing both area and energy/power savings. He also shows that the technology is not limited to mature processes, but can also be scaled to nanometer nodes.
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