Keeping Pace with Memory Technology using Advanced Verification
My latest webinar, Keeping Pace with Memory Technology using Advanced Verification, begins by taking the audience back in time. To a time when memories had low density, slow performance, and required expensive silicon real estate. Then I fast forward back to the future when memory technologies have evolved to support huge densities, blazing fast speeds while keeping power consumption low, and all this within very small geometry.
To read the full article, click here
Related Semiconductor IP
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
- I2C and SPI Master/Slave Controller
- AHB/AXI4-Lite to AXI4-Stream Bridge
Related Blogs
- Keeping Up with UCIe 1.1 Verification Using Synopsys VIP for UCIe
- Keeping up with NVMe Technology Through Compliance Testing and Pre-Production Verification
- Improving RISC-V Processor Quality with Verification Standards and Advanced Methodologies
- An inconvenient truth about using DDR3 SDRAM for embedded designs