IP Design & Functional Verification - Top Trends for 2015
February 13, 2015
A few weeks ago, we had asked the design & functional verification community to tell us what topics they want more information on in 2015. And the verdict is in! Some results are expected while others are surprising insights. Here is a summary of the results.
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- Parameterizable compact BCH codec
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
- Microsecond Channel (MSC/MSC-Plus) Controller
Related Blogs
- Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs
- 2013 CES: Top 4 Trends Benefiting EDA
- Industry's First Verification IP for PCIe 7.0
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
Latest Blogs
- Physical AI at the Edge: A New Chapter in Device Intelligence
- Rivian’s autonomy breakthrough built with Arm: the compute foundation for the rise of physical AI
- AV1 Image File Format Specification Gets an Upgrade with AVIF v1.2.0
- Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES
- Integrating Post-Quantum Cryptography (PQC) on Arty-Z7