Incredibly Scalable High-Performance RISC-V Core IP
Introducing the new SiFive U8-Series Core IP
SiFive is pleased to introduce the SiFive U8-Series Core IP, an incredibly scalable high-performance microarchitecture for modern SoC designs. The SiFive U8-Series is the highest performance RISC-V ISA based Core IP available today, based on a superscalar out-of-order pipeline with configurable pipeline depth and issue queue width. SiFive U8-Series Core IP is designed for use in performance- and latency-sensitive markets, such as automotive, datacenter attach, and edge or end point deep learning SoCs.
The needs of the modern world to solve problems using deep learning and real-time low latency processing are increasing compute workloads in the enterprise, and migrating tasks into the edge and end point. Domain specific SoCs are being used to localize compute to reduce latency, improve workload performance, and increase efficiency. The requirements of modern SoCs include scalable processor cores that span current process technology, enabling configurable designs, and permit customization.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- AVSBus v1.4.1 Verification IP
- Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
- DDR5 MRDIMM PHY and Controller
- APV - Advanced Professional Video Codec
Related Blogs
- High-Bandwidth Core Access to Accelerators: Enabling Optimized Data Transfers with RISC-V
- Have you checked the hidden costs of deploying an open source RISC-V core?
- Rambus AES-32 Cryptographic Accelerator IP Core Is Common Criteria Certified
- Synopsys TileLink Interconnect Verification IP for RISC-V SoCs
Latest Blogs
- The Evolution of AI and ML- Enhanced Advanced Driver Systems
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison