Improving RISC-V Processor Quality with Verification Standards and Advanced Methodologies
At the RISC-V Summit in December, there were presentations halfway between a keynote and a technical session. known as RISC-V Spotlights. These were presented to the entire group of attendees but were not blessed with the keynote title. Maybe this is like the way that when a physician in Britain becomes a surgeon, they drop the title "Dr." and go back to "Mr.". A spotlight is even better than a keynote. One spotlight was by Simon Davidmann of Imperas titled Improving RISC-V Processor Quality with Verification Standards and Advanced Verification Methodologies.
Simon and I go back a long way, ever since he was the VP of Sales for Ambit in Europe in the era when I was VP of Engineering. One of our lead customers was Ericsson in Stockholm, and I remember jointly visiting the group there at least once. Ericsson was what I thought of as a dream customer, at least partially because everyone knows who they are. They were also a dream customer in another way: their design was too big for any other synthesis tool to handle, but our BuildGates product could just synthesize the entire design. When that happens to a customer, they pretty much would just say, "please take our money," and Ericsson did. But I digress.
To read the full article, click here
Related Semiconductor IP
- Configurable RISC-V processor IP core
- Ultra-Low-Power Deeply Embedded RISC-V Processor
- Low-Power Deeply Embedded RISC-V Processor
- 32 Bit - Embedded RISC-V Processor Core
- 32 bit - Compact RISC-V Processor Core
Related Blogs
- Raising RISC-V processor quality with formal verification
- Effectively hiding sensitive data with RISC-V Zk and custom instructions
- Integrating Coherent RISC-V SoCs: Advanced Solutions with Perspec
- Reducing Manual Effort and Achieving Better Chip Verification Coverage with AI and Formal Techniques
Latest Blogs
- Cadence Extends Support for Automotive Solutions on Arm Zena Compute Subsystems
- The Role of GPU in AI: Tech Impact & Imagination Technologies
- Time-of-Flight Decoding with Tensilica Vision DSPs - AI's Role in ToF Decoding
- Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles
- Deep Robotics and Arm Power the Future of Autonomous Mobility