How 8k UHD Displays for Emerging Technologies are Enabled in MIPI DSI
February 13, 2019
High resolution 8k UHD displays for emerging technologies like connected cars, IoT, and AR/VR (Augmented/Virtual Reality) require high bandwidth to support the high-resolution transmission. MIPI DSI is the widely used display interface, but the bandwidth provided by PHY layers isn’t sufficient enough to support the high-resolution displays; therefore, a compression technique like DSC (Display Stream Compression) is required. One of our recent blog discussed about DSC 1.2 in HDMI 2.1 – High Resolution Displays for Mobile, TV, PC and Automotive Enabled by DSC 1.2 in HDMI 2.1. In this blog, we will see how DSC 1.2 enables MIPI DSI to support the high-resolution displays for emerging applications.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related Blogs
- How Synopsys and NVIDIA Are Accelerating Semiconductor Scaling in the AI Age
- GPUs in cars are for more than just graphics
- Doing JEDEC or MIPI IP Verification? Here Are Some Test Plans
- MIPI CSI-2 v2.0: Emerging Applications in IoT, Drones and Automotive
Latest Blogs
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
- Quintauris: Accelerating RISC-V Innovation for next-gen Hardware
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?