Finfet's Struggles Boost Simpler, Cheaper FD-SOI
April 30, 2014
FD-SOI, seeking to grow its ecosystem, will get a boost from the remarks of KLA Tencor CEO, Rick Wallace, about the struggles his customers are having with finfets.
“In logic and foundry, with the introduction of the new 3-D gate architectures, the yield issues our customers are grappling with today are proving to be the most challenging that the industry have ever faced, and even the smallest variation and process margin can cause significant yield losses for these devices,’ says Wallace.
FD-SOI uses few masks and has less processing steps than finfet.
To read the full article, click here
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- HBM4 Controller IP
- IPSEC AES-256-GCM (Standalone IPsec)
Related Blogs
- FinFET vs FDSOI - Which is the Right One for Your Design?
- FD-SOI vs FinFET: Dan Hutcheson Re-Runs His Survey
- Altera vs Xilinx FinFET Update
- TSMC vs Intel vs Samsung FinFETs
Latest Blogs
- ReRAM in Automotive SoCs: When Every Nanosecond Counts
- AndeSentry – Andes’ Security Platform
- Formally verifying AVX2 rejection sampling for ML-KEM
- Integrating PQC into StrongSwan: ML-KEM integration for IPsec/IKEv2
- Breaking the Bandwidth Barrier: Enabling Celestial AI’s Photonic Fabric™ with Custom ESD IP on TSMC’s 5nm Platform