FD-SOI: a Gentle Introduction
July 27, 2015
Over the last couple of weeks, FD-SOI has been in the news with GlobalFoundries announcement of a 22nm FD-SOI process that will run in the Dresden Fab. Also, earlier in the week I talked to Thomas Skotnicki about the saga (and it is a saga) of how FD-SOI got from his PhD thesis to volume manufacturing and global deployment. But there is a lot less knowledge around about FD-SOI than there is about FinFET so I thought it would be good to go back and see where the motivation for a process like that came from.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Complex Digital Up Converter
- Bluetooth Low Energy 6.0 Digital IP
- Verification IP for Ultra Ethernet (UEC)
- MIPI SWI3S Manager Core IP
Related Blogs
- ARM furthers its "cover the earth" strategy with introduction of R5 and R7 core variants for fast, real-time, deterministic SoC applications
- ST To Run 28nm FD-SOI NovaThor Next Week
- Can "Less than Moore" FDSOI provides better ROI for Mobile IC?
- FD-SOI Can Deliver Leading-Edge European IC Process Technology
Latest Blogs
- CNNs and Transformers: Decoding the Titans of AI
- How is RISC-V’s open and customizable design changing embedded systems?
- Imagination GPUs now support Vulkan 1.4 and Android 16
- From "What-If" to "What-Is": Cadence IP Validation for Silicon Platform Success
- Accelerating RTL Design with Agentic AI: A Multi-Agent LLM-Driven Approach