Evolution of process models, part I
Thirty five years ago, in 1976, the Concorde cut transatlantic flying time to 3.5 hrs, Apple was formed, NASA unveiled the first space shuttle, the VHS vs Betamax wars started, and Barry Manilow’s I Write the Songs saturated the airwaves. Each of those advances, except perhaps Barry Manilow, was the result of the first modern-era, high-production ICs.
During those years, researchers were anticipating the challenges of fabricating ICs that, according to Moore’s Law, would double in transistor count about every two years. Today, the solution to making features that are much smaller than the 193nm light used in photolithography is collectively referred to as computational lithography (CL). Moving forward into double patterning and even EUV Lithography, CL will continue to be a critical ingredient in the design to manufacturing flow. Before we get distracted by today’s lithography woes, let’s look back at the extraordinary path that brought us here.
To read the full article, click here
Related Semiconductor IP
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- USB 20Gbps Device Controller
- SM4 Cipher Engine
- Ultra-High-Speed Time-Interleaved 7-bit 64GSPS ADC on 3nm
- Fault Tolerant DDR2/DDR3/DDR4 Memory controller
Related Blogs
- The Evolution of Generative AI up to the Model-Driven Era
- Cadence Silicon Success of UCIe IP on Samsung Foundry’s 5nm Automotive Process
- Ethernet Evolution: Trends, Challenges, and the Future of Interoperability
- The Evolution of AI and ML- Enhanced Advanced Driver Systems
Latest Blogs
- Shaping the Future of Semiconductor Design Through Collaboration: Synopsys Wins Multiple TSMC OIP Partner of the Year Awards
- Pushing the Boundaries of Memory: What’s New with Weebit and AI
- Root of Trust: A Security Essential for Cyber Defense
- Evolution of AMBA AXI Protocol: An Introduction to the Issue L Update
- An Introduction to AMBA CHI Chip-to-Chip (C2C) Protocol