CDN LIVE 2011 Trip Report: Realizing EDA360
The question I asked in my first EDA360 blog was, “Will EDA360 be an industry transformation catalyst or a failed public relations campaign?” After various conversations with John Bruggeman and attending the CDN LIVE conference in San Jose I definitely see EDA360 as a transformational catalyst for Cadence but not necessarily for the EDA industry on a whole, yet.
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related Blogs
- Cadence EDA360 Redux!
- EDA360 Is More Than Design IP Plus Software Drivers
- What you need to know about EDA360
- ARM's Cortex-A15: A big step up for the ARM processor architecture. Targeting 32nm and 28nm technology nodes
Latest Blogs
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
- Quintauris: Accelerating RISC-V Innovation for next-gen Hardware
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?