DARPA Calls For 50X Improvement in SoC
As recently reported, in an effort to initiate resurgence of the U.S. electronics industry, some $500-$800 million will be invested in post-Moore's Law technologies.
Quoting from the BAA: “As noted above, the 3DSoC technology demonstrated at the end of the program (3.5 Years) should also have the following characteristics:
- Capability of > 50X the performance at power when compared with 7nm 2D CMOS technology.
- …” This is a paradigm shift for the computer industry and to high-tech world as normal scaling would provide as 3x at best, as indicated by the following well known chart:
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
- SHA-256 Secure Hash Algorithm IP Core
Related Blogs
- Solve SoC Bottlenecks with Smart Local Memory in AI/ML Subsystems
- Ensuring Integrity: The Role of SoC Security in Today's Digital World
- 2024 Set The Stage For NoC Interconnect Innovations In SoC Design
- Portable Stimulus: The Next Big Leap In SoC Verification
Latest Blogs
- The Future of Storage: From eMMC to the Blazing Speeds of UFS 5.0
- Reimagining Chip Design - From Spec to Signoff with Cadence AI Super Agents
- The Architectural Evolution of 16GHz PLLs for Next-Gen AI and SerDes SoCs
- Considerations When Architecting Your Next SoC: NoCs with Arteris
- Implementing Dual-core Lockstep in the CHIPS Alliance VeeR EL2 RISC-V core for safety-critical applications