Arteris vs Sonics battle...Let's talk NoC architecture
November 4, 2011
The Network on Chip is a pretty recent concept. Let’s try to understand how it works. Anybody who has been involved in the Supercomputer design (like I was in the 80’s), knows that you need a “piece” between the multiple CPU and memory banks, at that time a “crossbar switch”. To make it outrageously simple, you want to interconnect the M blocks on the left side with the N blocks on the right side, to do so you create a switch made of MxN wires.
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Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related Blogs
- Hogan NoC analysis - Sonics SGN, Arteris FlexNoC, ARM NIC 400: Setting the record straight
- NoC Interconnect Technology Becoming Mainstream
- Breaking Down the "Make vs. Buy" Barriers for IP
- The Gartner Hype Cycle & Technology Adoption Lifecycle Explained (using NoC Technology)