ARM Cortex-A9 SMP Design Announced
September 17, 2009
ARM just announced a couple of 2-core SMP design based upon the Cortex-A9 application processor, one optimized for performance and the other for power consumption. Although the optimization points are different, both are incredibly low power consumers by server standards with the performance-optimized part dissipating only 1.9W at 2Ghz based upon the TSMC 40G process (40nm). This design is aimed at server applications and should be able to run many server workloads comfortably.
To read the full article, click here
Related Semiconductor IP
- Bluetooth Low Energy 6.0 Digital IP
- Ultra-low power high dynamic range image sensor
- Flash Memory LDPC Decoder IP Core
- SLM Signal Integrity Monitor
- Digital PUF IP
Related Blogs
- Processor Wars: NVIDIA reveals a phantom fifth ARM Cortex-A9 processor core in Kal-El mobile processor IC. Guess why it's there?
- Cortex-X: The X-factor in Arm's CPU performance trajectory
- NVIDIA, Arm CEOs Share Vision of a Deal Made for a Hypergrowth Era
- Arm M&A Nonsense
Latest Blogs
- Trust at the Core: A Deep Dive into Hardware Root of Trust (HRoT)
- Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer
- LPDDR6: The Next-Generation LPDDR Device Standard and How It Differs from LPDDR5
- MIPI MPHY 6.0: Enabling Next-Generation UFS Performance
- How Does Crocodile Dundee Relate to AI Inference?