SRAM compiler IP
Filter
Compare
425
IP
from
18
vendors
(1
-
10)
-
GLOBALFOUNDRIES 22nm High Density Single-Port SRAM Compiler
- High Density
- Low Leakage
- Low Power
- High Speed
-
Silterra 0.13Z 1.5v High Density Single-Port SRAM Compiler
- Low Power
- Low Leakage
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
-
TSMC CLN5FF High Density Single Port SRAM Compiler
- The High Density Single Port SRAM operates within voltage range from 0.675 V to 0.825 V and junction temperature range from -40 °C to 125 °C. The available supported macro size is configurable from 512 bits to 576K bits. The Compiler is divided into 1 groups according to their column selection numbers (Mux=8).
- ? Pins and metal layers
- – 1P3M (1X_h_1Xb_v): 3 metal layers used and top metal is MXb.
- – Power mesh supported with M3 pins
-
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler range up to 64 k
- Smart periphery design to reach the highest density
- Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
- Flexible architecture
- To offer several performance trade-offs for any memory size
-
Silterra 0.11um High Density Single-Port SRAM Compiler
- High Density
- Low Power
- Low Leakage
- High Speed
-
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
- Reduce the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of SVT/HVT periphery