VeriSilicon SMSB 0.11um Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor Manufacturing Corporation (SMSB) 0.11um 1P8M 1.2V/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMSB 0.11 Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 , 7 or 8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
Silterra 0.11um High Density Single-Port SRAM Compiler
Overview
Key Features
- High Density
- Low Power
- Low Leakage
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Write Mask Function
- More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp
Technical Specifications
Short description
Silterra 0.11um High Density Single-Port SRAM Compiler
Vendor
Vendor Name
Maturity
Pre-Silicon
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