VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for Samsung FDSOI 28nm process can flexibly generate memory blocks via a friendly GUI or shell commands. It uses copper metallization with 10 metal levels (6 thin + 2 medium + 2 thick) and ultra low-K dielectrics.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler uses thin metals up to metal5 and supports the metallization options of 6U1x_2U2x_2T8x_LB and 6U1x_2T8x_LB. Dummy bit cells are designed in with the intention to enhance reliability.
Samsung 28nm Low Power Single-Port SRAM Compiler
Overview
Key Features
- Low Power
- Low Leakage
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Write Mask Function
Technical Specifications
Foundry, Node
Samsung, 28nm
Maturity
Silicon proven
Samsung
Silicon Proven:
28nm
FDS
Related IPs
- Samsung 28nm Low Voltage Single-Port SRAM Compiler
- Single Port SRAM Compiler GF22FDX Low Power
- Silterra 0.11um High Density Single-Port SRAM Compiler
- Silterra 0.13Z 1.5v High Density Single-Port SRAM Compiler
- GLOBALFOUNDRIES 22nm Low Power Single-Port SRAM Compiler
- GLOBALFOUNDRIES 22nm Low Leakage Single-Port SRAM Compiler