Isp IP

The Image Signal Processing (ISP)-- ISI700 receives camera sensor data via the 4-channel DVP interface
It is designed for multi-camera, multi-exposure high dynamic range (HDR) image signal processor (ISP) for the mid- to high-end consumer and surveillance market
The ISI700 offers the following functions: It brings advanced imaging technologies and chromatic aberration correction to provide unrivalled image quality and support to a large number of HDR sensor formats

For IR/Mono/RGB Bayer/RGB-IR/PDAF/HDR/Fish Eye/3A Sensors Image Process to Human/Machine Vision

Complete HDR ISP video processing framework for multi-channel vision and AI systems

Support RGB Bayer progressive image sensor and Monochrome progressive image sensor
Support 8 ~ 14 bit input data Bayer

Supporting Formats: MIPI CSI2 UHD 3840x2160@60fps support RAW Bayer / RGGB / RCCB
Imput / Output Data I/F: AMBA AXI-Stream master/slave protocol
Register Control I/F: AMBA AXI-Lite
Supported Device: ASIC / ASSP / SoC / FPGA

Advanced motion compensation algorithms virtually eliminate HDR merge artifacts and transition noise
Proprietary Locally Adaptive Tone Mapping technology

The logiISP-UHD Image Signal Processing Pipeline IP core is an Ultra High Definition (UHD) ISP pipeline designed for digital processing and image quality enhancements of an input video stream in Smarter Vision embedded designs based on Xilinx ACAP, MPSoC, SoC and FPGA devices.
It enables parallel processing of multiple Ultra HD video inputs in different programmable devices, ranging from the small Xilinx Artix®-7 FPGAs to the latest Xilinx Versal Adaptive Compute Acceleration Platform (ACAP) devices.

32bit DVP interface, 24bit ISP pipeline
Dual pixel per cycle throughput
Wide Dynamic Range Tone Mapping (WDR)
Multi-exposure HDR (Native/build in HDR, Compand output, DOL/Stagger, Stagger output)

ISP IP