Iso 26262 risc-v IP

The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security cores offering security by design for automotive applications.
They protect against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.

32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications

Custom-designed 32-bit RISC-V secure processor
Security model include hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
Standard hardware cryptographic accelerators, including AES (all modes), HMAC, SHA-2 (all modes), RSA up to 4096 bits, ECC up to 521 bits, a NIST-compliant Random Bit Generator, AXI Multi Issue Out-of-Order, and Fast DMA capability. Additional algorithms such as Whirlpool (SHE), SHA-1 (legacy), AES-CMAC, SHA-3, Poly1305, ChaCha and OSCCA SM2-3-4 are available
Multi-layered security model protects all core components against a wide range of attacks

The automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 compliant hardware security modules offering Quantum Safe security by design for secure automotive applications.
The CryptoManager RT-7xx family protects against a wide range of hardware and software attacks through state-of-the-art side channel attack countermeasures and anti-tamper and security techniques.

D23-SE processor core certified by parts 2, 4, 5, 7, 8 and 9 of the standards, meeting the architectural metrics and random hardware fault metrics requirements for ASIL B/D
D23-SE supports split-mode that 2 cores could run independently when split-lock is configured. ECC for memory soft error protection; bus protection to protect bus transaction; core trap status bus interface provides real time information of trap status from core.

The EMSA5-FS is a processor core designed for functional safety.
The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing the RISC-V Instruction Set Architecture (ISA).

ISO 26262 RISC-V IP