RT-640 Embedded Hardware Security Module (HSM) for Automotive ASIL-B

Overview

Rambus Hardware Root of Trust RT-640 is a fully programmable, ISO-26262 ASIL-B ready hardware security core offering security by design for automotive applications. It protects against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.

As the connected nature of automobiles evolves, device architects face a growing array of emerging security threats. Whether V2X, ADAS, infotainment, or other application, one constant in automotive design is the need for a hardware root of trust-based security implementation. The Rambus RT-640 is the ideal security co-processor for ISO-26262 ASIL-B applications.

Key Features

Custom-designed 32-bit RISC-V secure processor
Security model include hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
Standard hardware cryptographic accelerators, including AES (all modes), HMAC, SHA-2 (all modes), RSA up to 4096 bits, ECC up to 521 bits, a NIST-compliant Random Bit Generator, AXI Multi Issue Out-of-Order, and Fast DMA capability. Additional algorithms such as Whirlpool (SHE), SHA-1 (legacy), AES-CMAC, SHA-3, Poly1305, ChaCha and OSCCA SM2-3-4 are available
Multi-layered security model protects all core components against a wide range of attacks
Includes a wide range of security modules, including True Random Number Generator, Canary logic for protection against glitching and overclocking, secure key derivation and key transport, life cycle management, secure test and debug, feature management

Benefits

Hardware root of trust employing a custom RISC-V secure processor
Secure in-core processing and industry-leading anti-tamper
Multi-layered security model provides protection of all components in the core
FIPS 140-2 & 140-3 CAVP compliant
FIPS 140-2 & 140-3 CMVP compliant

Block Diagram

Applications

Automotive

Deliverables

Verilog RTL Design database
Tools and Scripts for synthesis and simulation
Complete verification test bench and comprehensive set of test vectors
Complete Documentation Set: Hardware Reference Manual, Integration Guide, HLOS Programmer’s Guide, Developer’s Guide, API Guide
Boot loader and firmware, including secure RTOS and security monitor
HLOS APIs for accessing capabilities
Secure Application SDK with complete development environment, including compiler, assembler, debugger, simulator, reference code, container-authoring software
QEMU implementation
Implementation of HLOS or ASIC components
Sample application demonstrating usage of Secure Application

Technical Specifications

Foundry, Node

Any

Maturity

In Production

Availability

Now

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