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Embedded FPGA IP

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Compare 246 IP from 66 vendors (1 - 10)
  • Embedded FPGA
    • Speedcore embedded FPGA (eFPGA) IP has brought the performance and flexibility of programmable logic to ASICs and SoCs.
    • Customers can integrate a Speedcore eFPGA IP into an ASIC or SoC for high-performance, compute-intensive and real-time processing applications such as artificial intelligence (AI), machine learning (ML), 5G wireless, networking, storage and automotive.
    Block Diagram -- Embedded FPGA
  • Embedded FPGA
    • Fully integrated into RTL SOC design flow
    • Highly scalable and customizable
    • Technology independent
    Block Diagram -- Embedded FPGA
  • DDR5/DDR4 and LPDDR5/LPDDR4 EMIF FPGA IP
    • DDR4 and DDR5 offer higher bandwidth and improved performance over previous generations, with DDR5 providing further enhancements in speed and power efficiency
    • LPDDR4 and LPDDR5 are optimized for low power consumption, making them ideal for embedded applications, with LPDDR5 offering even faster data rates and improved energy management
    • When integrated with Altera FPGAs these memory technologies enable faster data processing and more efficient power usage for a wide range of applications including networking, cloud and edge.
  • RapidIO Intel® FPGA IP
    • Intel is discontinuing the intellectual property (IP) for RapidIO I and RapidIO II, more information can be found in the product discontinuance notification (PDN2025).
    Block Diagram -- RapidIO Intel® FPGA IP
  • Scalable Switch Intel® FPGA IP for PCI Express
    • The Scalable Switch Intel® FPGA IP for PCI Express is a fully configurable switch that implements one fully configurable upstream port and connectivity for up to 64 downstream ports.
    Block Diagram -- Scalable Switch Intel® FPGA IP for PCI Express
  • Multichannel DMA Intel FPGA IP for PCI Express*
    • The Multichannel DMA IP for PCI Express provides high efficiency, speed, and configuration flexibility to support various applications from HPC, cloud, networking, to embedded
    • With support for up to 2048 channels and Linux-based PCIe drivers provided, this low latency, low resource utilization solution is essential in handling movements of large volumes of data to optimize system performance.
    Block Diagram -- Multichannel DMA Intel FPGA IP for PCI Express*
  • HDMI Intel® FPGA IP Core
    • The HDMI Intel FPGA intellectual property (IP) core provides support for the next generation of video display interface technology
    • Due to its ability to send high-definition audio and video, High-Definition Multimedia Interface (HDMI) has become the most common digital connection in consumer electronics.
    Block Diagram -- HDMI Intel® FPGA IP Core
  • DisplayPort Intel® FPGA IP Core
    • Intel now offers a fully VESA-compliant DisplayPort Intel® FPGA IP core v1.4
    • The DisplayPort IP core is found prevalently in many video-related products servicing a wide variety of applications and has the following features:
    Block Diagram -- DisplayPort Intel® FPGA IP Core
  • Multi-Rate Ethernet PHY FPGA IP
    • The Multi-Rate Ethernet PHY FPGA IP core can dynamically support multiple data rates without any design regeneration or device reconfiguration
    • This IP allows the creation of a 1G to 10G configuration that allows dynamic reconfiguration across all Ethernet rates from 10M, 100M, 1G, 2.5G, 5G, and 10G.
    Block Diagram -- Multi-Rate Ethernet PHY FPGA IP
  • NCO Intel® FPGA IP Core
    • A numerically controlled oscillator (NCO) is a digital signal generator, which synthesizes a discrete-time, discrete-valued representation of a sinusoidal waveform
    • You can typically use NCOs in communication systems
    • In such systems, they are used as quadrature carrier generators in I-Q mixers, in which baseband data is modulated onto the orthogonal carriers in one of a variety of ways.
    Block Diagram -- NCO Intel® FPGA IP Core
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