Low-Power Embedded RISC-V Processor

The BA5x-LP is a highly efficient, low-power, 32-bit, deeply embedded processor IP core.

The two-stage pipeline processor implements either the RV32I or RV32E instruction set. It comes pre-configured with the Multiply/Divide (M) and Compressed Instruction (C) extensions, providing a more flexible and capable platform without a significant increase in area or power. The core’s small silicon footprint, starting at 28k gates, minimizes leakage currents while idle and reduces dynamic power consumption.

An optional Vectored Interrupt Controller (VIC), complementing the RISC-V PIC and CLINT, can manage up to 64 interrupt sources, enable low-latency and predictable-time interrupt response, provide precise control over interrupt prioritization, and simplify interrupt handling routines. The BA5x-LP is also equipped with an instruction cache of configurable size (up to 64 kB) and associativity (up to 4-way), to reduce instruction fetch latency and power consumption and improve performance when executing from a slow or high-latency memory (e.g., off-chip flash memory, or DRAM).

The compact BA5x-LP is exceptionally efficient and scores 3.0 Coremarks/MHz (more processing power per MHz than most processors in its class). This allows operating the core at low frequencies to further save power, or meeting more demanding embedded processing requirements, or any optimum combination of both.

Easy Integration and Low Risk

The processor core uses AMBA^® AXI4 or AHB-Lite, and low-latency Quick-access Memory (QMEM) interfaces for fetching instructions and accessing data and peripherals. The debug unit connects to an external JTAG/TAP controller via an APB port.

Part of the family of processor cores available from CAST for more than a decade and used by hundreds of customers, the BA5x-LP IP core has been designed for easy reuse and integration, has been rigorously verified, and is LINT-clean, scan-ready, and silicon-proven. It is available in Verilog source code.

To further accelerate implementation, the processor core can be delivered pre-integrated with bus infrastructure cores, typical microcontroller peripherals, memory controllers, and interconnect IP cores. Please contact CAST Sales for details.

Software Development

The BA5x-LP can be used with RISC-V compatible toolchains, libraries, and IDEs, or the included BeyondStudio™ IDE. This Eclipse-based Integrated Development Environment (IDE) combines an instruction-level simulator and the latest version of the RISC-V GNU toolchain. Employed by numerous BAx processor users for over a decade, BeyondStudio is a complete and fully featured IDE. Reference designs on FPGA development boards are available to ease evaluations and accelerate code development. Contact CAST Sales for more information.

Compact, Low-Power Architecture

• Small silicon footprint for lower leakage and dynamic CPU power
  • From 28k gates
• Advanced power management
  • Dynamic clock gating and unused units power shut off
  • Software- and hardware-controlled clock frequency scaling
• Single-issue, in-order, 2-stage pipeline
• Harvard architecture with separate instruction and data AXI-Lite and Quick-access Memory (QMEM) buses
• Optional L1 instruction cache with synthesis-time configurable associativity and size

Performance

• 3.0 Coremarks/MHz
• Over 500 MHz in 16 nm

RISC-V Features

• 32-bit Base RISC-V ISA (RV32E) with Compressed Instructions (C), Multiply/Divide (M), and Fence.i (Zifencei) enabled
• Supports User and Machine Modes
• Core Local Interrupt Controller (CLINT) for timer and software interrupts
• Programmable Interrupt Controller (PIC) for up to 64 direct external interrupts
• Wait-for-Interrupt (WFI) instruction puts the processor into a low-power state until an interrupt assertion

Available Pre-Integrated Platforms

• Integrate bus fabric with peripherals such as GPIO, UART, Real-Time Clock, Timers, I2C, and SPI
• Optionally customized to include memory controllers, interconnects, and more from the CAST IP line

Low Risk & Flexible Licensing

• Industry-standard licensing terms with royalty-free options
• Reliable vendor with an extensive track record and excellent support
  • Thousands of IP core licenses, and billions of units shipped with IP from CAST since 1997
  • Experienced and responsive support team with a 24/7 culture

Debug and IDE Support

• JTAG Debug with hardware triggers
• Use standard RISC-V IDEs or the included Eclipse-based BeyondStudio™

• The core is available for ASICs in synthesizable Verilog.
• It includes everything required for successful implementation: extensive documentation, a testbench, a sample SoC design, and a sample synthesis and simulation script.