Enhanced-Processing Embedded RISC-V Processor

The BA5x-EP is a highly-featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications. It is equipped with a floating-point unit and cache memories, supports hardware-level virtualization, and is suitable for concurrent execution in a multi-processor environment.

The processor features a two- or five-stage pipeline and supports either the RV32I or RV32E base instruction set. It is delivered preconfigured with the standard and optional RISC-V extensions needed to optimize code density, performance, and power efficiency: Integer Multiply/Divide (M), Compressed Instructions (C), Single/Double-Precision Floating-Point (F/D), Atomic Instructions (A), Zifencei, and Code Size Reduction (Zc). The BA5x-EP integrates comprehensive hardware-level hypervisor support, which enables the robust spatial and temporal isolation of software components and enhances security and safety, even in the absence of an operating system.

With a gate count starting at approximately 100K gates and a Coremarks score of 2.53 to 3 Coremarks/MHz, the BA5x-MAX balances between performance, power consumption, and silicon area. To reduce access time to high-latency or slow memories and improve performance, the BA5x-MAX implements instruction and data caches of configurable size and associativity.

Easy Integration and Low Risk

The processor core uses AMBA^® AXI4 or AHB-Lite, and low-latency Quick-access Memory (QMEM) interfaces for fetching instructions and accessing data and peripherals. The debug unit connects to an external JTAG/TAP controller via an APB port.

Part of the family of processor cores available from CAST for more than a decade and used by hundreds of customers, the BA5x-EP IP core has been designed for easy reuse and integration, has been rigorously verified, and is LINT-clean, scan-ready, and silicon-proven. It is available in Verilog source code.

To further accelerate implementation, the processor core can be delivered pre-integrated with bus infrastructure cores, typical microcontroller peripherals, memory controllers, and interconnect IP cores.

Software Development

The BA5x-EP can be used with RISC-V compatible toolchains, libraries, and IDEs, or the included BeyondStudio™ IDE. This Eclipse-based Integrated Development Environment (IDE) combines an instruction-level simulator and the latest version of the RISC-V GNU toolchain. Employed by numerous BAx processor users for over a decade, BeyondStudio is a complete and fully featured IDE.

Reference designs on FPGA development boards are available to ease evaluations and accelerate code development. Contact CAST Sales for more information.

Compact & Efficient Architecture

• Small silicon footprint for lower leakage and dynamic CPU power
  • From 100k gates
• Advanced power management
  • Dynamic clock gating and unused units power shut off
  • Software- and hardware-controlled clock frequency scaling
• Single-issue, in-order, 2- or 5-stage pipeline
• Harvard architecture
• Optional instruction and data caches with synthesis-time configurable associativity (up to 4-way) and size (up to 64kB)

Performance

• 3.0 or 2.53 (5-stage) Coremarks/MHz
• Over 500 MHz in 16 nm

RISC-V Features

• 32-bit Base RISC-V ISA (RV32I/E) with Compressed Instructions (C), Multiply/Divide (M), Single/Double-Precision Floating-Point (F/D), Atomic Instructions (A), Code Size Reduction (Zc), and Fence.i (Zifencei) enabled
• Supports Hypervisor, Supervisor, User, and Machine Modes
• Core Local Interrupt Controller (CLINT) for timer and software interrupts
• Programmable Interrupt Controller (PIC) for up to 64 direct external interrupts
• Wait-for-Interrupt (WFI)

Available Pre-Integrated Platforms

• Integrate bus fabric with peripherals such as GPIO, UART, Real-Time Clock, Timers, I2C, and SPI
• Optionally customized to include memory controllers, interconnects, and more from the CAST IP line

Low Risk & Flexible Licensing

• Industry-standard licensing terms with royalty-free options
• Reliable vendor with an extensive track record and excellent support
  • Thousands of IP core licenses, and billions of units shipped with IP from CAST since 1997
  • Experienced and responsive support team with a 24/7 culture

Debug and IDE Support

• JTAG Debug with hardware triggers
• Use standard RISC-V IDEs or the included Eclipse-based BeyondStudio™

• The core is available for ASICs in synthesizable Verilog.
• It includes everything required for successful implementation: extensive documentation, a testbench, a sample SoC design, and sample synthesis and simulation scripts.