Cortus APS3 processor IP
Filter
Compare
77
IP
from
3
vendors
(1
-
10)
-
I/O Library with LVDS in SkyWater 90nm
- A SkyWater I/O Library combining standard GPIO, I2C-compatible ODIO, analog I/O, and integrated LVDS for robust mixed-signal and moderate-speed differ ential interfaces.
-
SLVS Transceiver in TSMC 28nm
- This 1.8V SLVS transceiver is a high-performance, low-power I/O solution optimized for TSMCs 28nm process.
- Designed with 1.8V thick oxide devices and a standard low-voltage core interface at 0.8V, this transceiver ensures robust operation across a wide temperature range (-40°C to 125°C).
- Supporting high-speed differential signaling up to 2Gbps, it delivers ex- ceptional signal integrity with low jitter and precise eye diagrams.
-
High-voltage solutions in baseline GlobalFoundries and multi-foundry technologies
- High-Voltage ESD
- Physical Features
-
-
-
-
-
A 28nm 1.8V-3.3V Fail-Safe General-Purpose IO & OSC
- Fail-Safe GPIO in TSMC 28nm process technology
- Physical features
- This library also features a 33MHz OSC (3.3V).
-
IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- Certus offers dedicated 1.8V, 3.3V and switchable 1.8V/3.3V General-Purpose IO (GPIO) solutions.
- GPIO features include:
- I2C / SMBUS Open-Drain I/O features include:
- LVDS I/O features include:
-
32Gbps SerDes PHY in GF 22nm
- This 32Gbps SerDes PHY is implemented in GlobalFoundries 22FDX CMOS technology and provides a high-performance, protocol-agnostic serial interface for advanced mixed-signal and high-speed digital SoCs.
- The PHY is architected as a modular design consisting of a low-jitter clock multiplier, a half-rate transmitter with digitally programmable feed-forward equalization, and a configurable CTLE-based receiver with digital clock-and-data recovery, supporting both 16 Gbps and 32 Gbps operation.
