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Compare 251 IP from 24 vendors (1 - 10)
  • Verification IP for CXL
    • Accelerated confidence in simulation-based verification of RTL designs with Compute Express Link (CXL) interfaces: CXL1, CXL2, CXL3, CXL3.1
    Block Diagram -- Verification IP for CXL
  • Compute Express Link (CXL) FPGA IP
    • Industry's first FPGA-based hardened CXL IP solution for Type 1, 2, and 3 devices.
    • First FPGA to pass CXL Consortium Compliance Program (up to 32 GT/s speed).
    Block Diagram -- Compute Express Link (CXL) FPGA IP
  • CXL - Enables robust testing of CXL-based systems for performance and reliability
    • CXL Verification IP is a cutting-edge solution for validating designs based on the Compute Express Link (CXL) protocol. With features like protocol compliance checks, cache coherency validation, and advanced debugging tools, it ensures robust and efficient testing of high-performance computing systems.
    • From HPC and AI to automotive and edge computing, CXL Verification IP supports diverse applications. It enables seamless communication between processors, memory, and accelerators, ensuring reliable performance in data centers, ML systems, cloud infrastructures, and telecom networks.
    Block Diagram -- CXL - Enables robust testing of CXL-based systems for performance and reliability
  • CXL Controller IP
    • The CXL/PCIe Controller IP carries out CXL 3.0 specification and is backward compatible to CXL 2.0 and 1.1.
    • Possessing high customizability and supportability, this controller provides a comprehensive CXL solution.
    Block Diagram -- CXL Controller IP
  • Simulation VIP for CXL
    • Device Configuration
    • Host, Device
    • Spec Version
    • 1.1, 2.0, 3.0
    Block Diagram -- Simulation VIP for CXL
  • CXL 3 Controller IP
    • The CXL 3 Controller IP is designed to support dual-mode operation, allowing dynamic selection between host and device modes.
    • It connects to standard 64GT/s PHYs through the PIPE 6.x interface and supports high data rates across various link widths.
    Block Diagram -- CXL 3 Controller IP
  • CXL Verification IP
    • Supports CXL specs revision 1.0, 1,1 and 2.0.
    • Supports Native PCIe mode and below features as defined in the PCIe specification.
    • PCIE Express specs 1.0/2.0/3.0/4.0/5.0/5.1
    • Serial, PIPE, PCS/PMA, Low pin count and SerDes interface
    Block Diagram -- CXL Verification IP
  • CXL CONTROLLER IIP
    • Compliant with CXL 1.0/1.1 Specifications
    • Supports Native PCIe mode and below features as defined in the PCIe specification
    • PCIE Express specs 1.0/2.0/3.0/4.0/5.0
    • PIPE interface
    Block Diagram -- CXL CONTROLLER IIP
  • CXL Switch Verification IP
    • Available in native System Verilog (UVM/OVM/ VMM) and Verilog
    • Unique development methodology to ensure the highest levels of quality
    • Availability of Compliance & Regression Test Suites
    • 24X5 customer support
    Block Diagram -- CXL Switch Verification IP
  • CXL 3.0 Verification IP
    • Available in native System Verilog (UVM/OVM/VMM) and Verilog.
    • Unique development methodology to ensure the highest levels of quality.
    • 24X5 customer support.
    • Unique and customizable licensing models.
    Block Diagram -- CXL 3.0 Verification IP
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