Dual-Port SRAM IP
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Dual-Port SRAM IP
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145
Dual-Port SRAM IP
from 13 vendors
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10)
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CodaCache® Last Level Cache IP
- Standalone IP
- 1.2 GHz frequency in 16FF+TT process
- Protocol interoperability: AMBA AXI 4
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Memory Compiler
- 70-90% power reduction
- Unmatched performance
- Multi-technology support
- Tailored for design needs
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IGMDLSX01A, TSMC CLN7FF High Speed Dual Port SRAM
- High Speed Dual Port SRAM with single clock
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Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
- Reduce the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of SVT/HVT periphery
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Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k
- Reduce the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of SVT/HVT periphery
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Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
- Reduce the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of SVT/HVT periphery
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Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
- 1.Reduce the die cost
- Unique architecture optimizing the periphery area for outstanding area gain
- 2.Extend the battery life
- Leakage reduction thanks to careful design structures, optional retention mode and choice of SVT/HVT periphery
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Silterra 0.18um ULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via ROM Compiler
- Low Leakage
- Low Power
- High Density
- High Speed
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HHGrace 0.11um ULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
- Low Leakage
- Low Power
- High Density
- High Speed
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HHGrace 0.11um LP Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
- Low Power
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access