IP for UMC

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Compare 3,050 IP for UMC from 48 vendors (1 - 10)
  • MPEG-1/2 + AAC Audio Decoder
    • The MPEG-1/2+AAC Audio Decoder (CWda99) is an audio IP core for decoding up to 6 audio channels in real-time.
    • This core contains the MPEG + AAC decoder software and the Coreworks processor based hardware audio engine platform (CWda3111).
    Block Diagram -- MPEG-1/2 + AAC Audio Decoder
  • AAC-LC Audio Decoder
    • The AAC-LC Audio Decoder (CWda87) is an audio IP core for decoding up to 6 audio channels in real-time.
    • This core contains the AAC-LC decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- AAC-LC Audio Decoder
  • AAC-LC Audio Encoder
    • The AAC-LC Audio Encoder (CWda86) is an audio IP core for encoding up to 6 audio channels in real-time.
    • This core contains the AAC-LC encoder software and the Coreworks processor based hardware audio engine platform (CWda3011).
    Block Diagram -- AAC-LC Audio Encoder
  • AAC-LC Stereo Audio Encoder
    • The AAC-LC Stereo Audio Encoder (CWda84) is an audio IP core for encoding one stereo stream in real-time.
    • This core contains the AAC-LC stereo encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- AAC-LC Stereo Audio Encoder
  • MPEG-1/2 – Layer I/II Audio Decoder
    • The MPEG-1/2 – Layer I/II Audio Decoder (CWda75) is an audio IP core for decoding one audio stream in real-time(1).
    • This core contains the MPEG-1/2 – Layer I/II decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- MPEG-1/2 – Layer I/II Audio Decoder
  • MPEG-1/2 - Layer I/II Audio Encoder
    • The MPEG-1/2 – Layer I/II Audio Encoder (CWda74) is an audio IP core for encoding one audio stream in real-time.
    • This core contains the MPEG-1/2 – Layer I/II encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- MPEG-1/2 - Layer I/II Audio Encoder
  • 2.26GHz/2.46GHz Fractional-N LC Phase-Locked Loop with oscillator
    • 180XFAB_PLL_01 uses 2.25792GHz/2.4576GHz Phase locked loop frequency synthesizer for clock generation.
    • It consists of the following main sub-blocks: reference oscillator; main PLL loop: Fractional-N PLL and VCO blocks; secondary digital PLL loop: synchronization subsystem; dividers block: clock generation/delivery subsystem; voltage stabilizers.
    • High frequency synthesis is needed for both phase noise performance and ultra-fine frequency tuning step.
    Block Diagram -- 2.26GHz/2.46GHz Fractional-N LC Phase-Locked Loop with oscillator
  • 10MHz to 50MHz fractional-N PLL synthesizer
    • UMC 22nm ULP technology
    • 1.8V IO power supply
    • Double 0.8/1.0V Core power supply
    • Embedded low noise bias
    Block Diagram -- 10MHz to 50MHz fractional-N PLL synthesizer
  • 1.2V SLVS Transceiver in UMC 110nm
    • This library delivers a compact and reliable 1.2V SLVS transceiver solution in UMC 110nm, optimized for high-speed, low-power applications.
    • Featuring robust supply and ground noise rejection, 2kV HBM ESD protection, and integrated on die termination, this library provides both transmit and receive paths compliant with JESD8-13 SLVS standards at up to 200 Mbps.
    Block Diagram -- 1.2V SLVS Transceiver in UMC 110nm
  • Bluetooth Platform IP
    • The GR2000 BLE Platform IPs are wireless IP targeting Bluetooth Low Energy applications.
    • The IPs are the cost-effective, ultra-low power, 2.4GHz RF IP.
    • Very low active RF and low-power mode current consumption provide excellent battery lifetime and allow for operation on small coin cell batteries and in energy-harvesting applications.
    • The IPs support Bluetooth 5 Low Energy key features: 1 Mbps/2Mbps and Long Range.
    Block Diagram -- Bluetooth Platform IP
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