AMBA AHB / APB/ AXI IP for TSMC

Compare 7 AMBA AHB / APB/ AXI IP for TSMC from 4 vendors (1 - 7)

PDM-to-PCM Conversion with AMBA Interface
- SNR 100dB; THD -100dB
- PDM (pulse-density modulated) Input
- PCM (pulse-code modulated) output
PCIe 3.1 Controller with AXI
- Compliant with the PCI Express 3.1/3.0, and PIPE (16- and 32-bit) specifications
- Compliant with PCI-SIG Single-Root I/O Virtualization (SR-IOV) Specification
- Supports Endpoint, Root-Port, Dual-mode configurations
- Supports x16, x8, x4, x2, x1 at 8 GT/s, 5 GT/s, 2.5 GT/s speeds
- Supports AER, ECRC, ECC, MSI, MSI-X, Multi-function, P2P, crosslink, and other optional features
- Supports many ECNs including LTR, L1 PM substates, etc.
SD 4.1 UHS-II PHY for TSMC 12nm FF
- Compliant to SD Specifications Part 1 UHS-II Specification Volume 2: PHY* and SD Specifications Part 1 UHS II Specification Volume 1: System and Protocol”
UHS-II PHY for SD4/SD5 TSMC 12nm FF
- Compliant with SD Specifications Part 1 UHS-II Addendum v1
- Supports data rate between 390 Mbps to 1.56 Gbps per lane
UHS-II PHY for SD4/SD5 TSMC 16nm FF
- Compliant with SD Specifications Part 1 UHS-II Addendum v1
- Supports data rate between 390 Mbps to 1.56 Gbps per lane
APB Slave
- APB Salve.
- Configurable and customizable.
- Synthesized on ASIC 40nm TSMC and Xilinx FPGA.
- Compatible with AMBA standard.
AHB Slave
- AHB Salve.
- Configurable and customizable.
- Synthesized on ASIC 40nm TSMC and Xilinx FPGA.
- Compatible with AMBA standard.