Multimedia IP for TSMC

Compare 34 Multimedia IP for TSMC from 9 vendors (1 - 10)

OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
- D/AVE NX is the latest and most powerful addition to the D/AVE family of rendering cores.
- It is the first IP to bring 3D graphics OpenGL ES 2.0 rendering (with some ES 3.0 / 3.1 extensions) to the FPGA and SoC world and – with offline-shader compilers – even into MCUs or low-end MPUs with small amounts of memory and bare-metal or RTOS operation systems.
3D OpenGL ES 1.1 GPU IP core
- D/AVE 3D is cost-efficient IP core for 3D graphics applications.
- This core is available for FPGAs, ASICs and SOCs, specifically designed for the embedded, automotive and infotainment market with a big emphasis on flexibility both in hardware and the software.
2.5D GPU
- The D/AVE HD 2.5D GPU family is an evolution of the D/AVE 2D family supporting high quality 2D and 3D rendering for displays up to 4K x 4K.
- Targeting modern graphics applications on high resolution displays in the Industrial, Medical, Military, Avionics, Automotive and Consumer markets, the D/AVE HD fixed-function 2.5D GPU core is designed to be fast with powerful functionality.
JPEG encoder
- Baseline JPEG compliant (ITU T.81), Motion JPEG
- Up to 12 bits depth possible (default: 8 bit)
- Super low latency (less than 1/10 of frame duration for rolling shutter cameras)
- Lossy compression by default
- Fully bit and cycle accurate co-simulation model available in Docker container
SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC
- SLVS-EC ver.3.0 compliant
- Data Rate: Up to 10Gbps / lane
- Number of data lane: 8
- Support input clock: 24MHz, 54MHz, 37.125MHz, 72MHz, 74.25MHz
Camera Receiver - 10.0Gbps 8-Lane - TSMC 12FFC
- The CL12812M8RIP10000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP.
- The CL12812M8RIP10000 is designed to support data rate in excess of maximum 10Gbps utilizing SLVS-EC ver.3.0 interface specification.
LVDS interfaces
- Wide operating range
- High data rates
- Very flexible programmability
- Excellent signal integrity
- TIA/EIA644A LVDS and sub-LVDS compatibility
- Receiver also compatible with LVPECL
AAC-LC Audio Encoder
- MPEG2/4 AAC-LC software employed Fraunhofer IIS high quality software which supports ISO/IEC 13818-7, ISO/IEC 14496-3 and Japanese ARIB standard
AAC-LC Audio Decoder
- compliant with the ISO/IEC 13818-7 audio standard, using Fraunhofer IIS high quality software
- Supported channel modes: mono, dual mono, stereo (2.0), 2.1, 3.0, 3.1, 4.0, 5.0, and 5.1
MPEG-1/2 + AAC Audio Decoder
- MPEG-1/2 and AAC decoders are compliant with the ISO/IEC 11172-3, 13818-7, and 14496-3 audio standards, using Fraunhofer IIS high quality software