Embedded Memories IP for TSMC
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Embedded Memories IP
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- 16nm
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eTCAM (Embedded Ternary Content Addressable Memory IP
- One cycle operation latency (without priority encoder)
- Valid Bit per entry to reduce power
- Valid Bit reset in one cycle support
- Mask input option for bit-write and masked search key
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TSMC CLN16FFC Ultra High Density One Port Register File
- The Ultra High Density One Port Register File operates within voltage range from 0.72 V to 0.88 V and junction temperature range from -40 °C to 125 °C. The available supported macro size is configurable from 128 bits to 72K bits. The Compiler is divided into 3 groups according to their column selection numbers (Mux=1, 2 or 4).
- Pins and metal layers
- 1P4M (2Xa1Xd_h): 4 metal layers used and top metal is MXd.
- Power mesh supported with M4 pins
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Tuneable multi-port register file architecture - TSMC 28HPC+
- Custom Register File Architecture
- Power savings >50%
- Wide operating voltage range
- Tuneable performance
- Single rail – interfaces directly to logic
- Supports multiple read/write ports
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Embedded OTP (One-Time Programmable) IP, 8Kx32 bits for 0.8V/1.8V FFC
- Logic Embedded IP
- Programming NeoFuse cell by using quantum tunneling mechanism
- High yield performance
- Small IP size
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Embedded OTP (One-Time Programmable) IP, 64x32 bits for 0.8V/1.8V FFC
- Logic Embedded IP
- Programming NeoFuse cell by using quantum tunneling mechanism
- High yield performance
- Small IP size
-
Embedded OTP (One-Time Programmable) IP, 8Kx32 bits for 0.8V/1.8V FFP
- Logic Embedded IP
- Programming NeoFuse cell by using quantum tunneling mechanism
- High yield performance
- Small IP size
-
GCRAM, the highest-density on-chip embedded memory in standard CMOS
- High-density bitcell offering up-to 2X area reduction over high-density 6T SRAM.
- Full logic compatibility with standard CMOS, no additional process steps or cost.