IP Catalog > Foundries > TSMC > Analog IP > Clocking IP

Clocking IP for TSMC

Welcome to the ultimate Clocking IP for TSMC hub! Explore our vast directory of Clocking IP for TSMC
All offers in Clocking IP for TSMC
Filter
Filter

Login required.

Sign in

Login required.

Sign in

Search (54)
Compare 54 Clocking IP for TSMC from 6 vendors (1 - 10)
Filter:
  • 6nm
  • All Digital Fractional-N RF Frequency Synthesizer PLL in TSMC N6/N7
    • Fractional Multiplication with frequencies up to 8GHz
    • Extremely low jitter (sub 300fs RMS)
    • Small size  (< 0.05 sq mm)
    • Low Power (< 7mW)
    Block Diagram -- All Digital Fractional-N RF Frequency Synthesizer PLL in TSMC N6/N7
  • Low Power All Digital Fractional-N PLL in TSMC N6/N7
    • Low power, suitable for IoT applications
    • Good jitter, suitable for clocking digital logic.
    • Extremely small die area (< 0.005 sq mm), using a ring oscillator
    • Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
    Block Diagram -- Low Power All Digital Fractional-N PLL in TSMC N6/N7
  • Low Power All Digital Fractional-N PLL in Samsung 8LPP
    • Low power, suitable for IoT applications
    • Good jitter, suitable for clocking digital logic.
    • Extremely small die area (< 0.005 sq mm), using a ring oscillator
    • Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
    Block Diagram -- Low Power All Digital Fractional-N PLL in Samsung 8LPP
  • Crystal Oscillators
    • The crystal oscillator macros are available in a wide range of industry-standard quartz crystals and MEMS resonators operating in the fundamental mode in the 32 kHz to 80 MHz range.
    • These oscillators, which are both power and area efficient, have a programmable transconductance to allow users to find the optimal balance between jitter and power consumption.
    Block Diagram -- Crystal Oscillators
  • Free running oscillators
    • Compact and low power
    • No external components
    • Baseline CMOS logic process masks only
    • Excellent frequency precision over PVT after trimming
    Block Diagram -- Free running oscillators
  • Low Power FracN/SSCG PLL on TSMC CLN6FF
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    • Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
    Block Diagram -- Low Power FracN/SSCG PLL on TSMC CLN6FF
  • 18-40MHz Crystal Oscillator on TSMC CLN6FF
    • Crystal Oscillator pad macro that supports many industry standard crystals in the 18-40MHz range (e.g. 24MHz, 25MHz, 38.4MHz)
    • Uses standard CMOS transistors
    • Crystal Oscillation Mode: Fundamental
    • Power down option for IDDQ testing
    Block Diagram -- 18-40MHz Crystal Oscillator on TSMC CLN6FF
  • 4.8GHz low jitter fractional-N, Digital PLL, TSMC N6, 0.75V, N/S orientation
    • Pure core voltage design
    • Compact IP size (< 0.013mm²) and low power consumption (1.1mW @ 3GHz)
    • Compatible with commonly used crystal oscillator frequencies
    • Good power noise immunity for period jitter (< ±15%/V)
    Block Diagram -- 4.8GHz low jitter fractional-N, Digital PLL, TSMC N6, 0.75V, N/S orientation
  • Wide Range Programmable Integer PLL on TSMC CLN6FF
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    • Low power consumption
  • Wide Range Multi-Output PLL on TSMC CLN6FF
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency (including multiple outputs) for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    • Low power consumption
×
Semiconductor IP