Memory & Libraries IP for SMIC

Compare 525 Memory & Libraries IP for SMIC from 20 vendors (1 - 10)

Bi-Directional LVDS with LVCMOS
- TIA/EIA644A LVDS and sub-LVDS compatibility
- Receiver also compatible with LVPECL
- Operates over 2Gbps and up to 3Gb/s in some processes
- Trimmable on-die termination, can be enabled while Tx is operating for better signal integrity
LVDS Receiver PHY
- Converts 5-pair LVDS data stream into parallel 35 bits of CMOS data
- Compatible with the TIA/EIA-644 LVDS standards
- Supports up to 1.05Gbps data rate for UXGA
- On-chip DLL requires no external component
LVDS transmitter PHY
- Silicon Proven in 22,28,55,65,130n,180n from SMIC, Global Foundries and Samsung
- Compatible with the National DS90CF386
- Compatible with the TIA/EIA-644 standards
- Converts 35 bits data to 5-pair LVDS data stream
800MHz LVDS Cell Set for 180nm
- 400MHz (800Mb DDR) operation.
- Receive, Transmit and bias cells.
V-by-One Tx IP, Silicon Proven in SMIC 40LL
- 16 channels total 128 bits of parallel data, each channel has a bit width of 8 bits
- DC coupling mode
- Multi-channel shared offset
- Built-in transmitter terminal impedance, no need for off-chip components
RF Transceiver SMIC 55nm
- 3GPP R14 NB_IOT??
- SMIC55nm??
- 2V ~ 3.6V????
- ???:??10mA,??68mA@14dBm output,200mA@22dBm output,????<1uA
LVDS TX+ (Transmitter) in UMC 40LP
- Compatible with TIA/EIA-644 LVDS Standard
- 49 Mbps - 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
LVDS Receiver
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- Up to 10.5 Gbit/s bandwidth
LVDS Transmitter
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- On-chip Input Jitter Filtering
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Full Low power CMOS design