Memory & Libraries IP for SMIC

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Compare 524 Memory & Libraries IP for SMIC from 20 vendors (1 - 10)
  • 512-bit EEPROM (NTLab)
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    • Programming and erase time – 2 ms
    Block Diagram -- 512-bit EEPROM (NTLab)
  • LVDS Transceiver
    • Meets or exceeds the TIA/EIA-644 LVDS standard.
    • Driver, Receiver, Bias, and Power cells included.
    • Greater than 400Mbs data rate.
    • 1.8V core voltage, 3.3V IO voltage.
    • Receive fault detection.
    Block Diagram -- LVDS Transceiver
  • LVDS Receiver PHY
    • Converts 5-pair LVDS data stream into parallel 35 bits of CMOS data
    • Compatible with the TIA/EIA-644 LVDS standards
    • Supports up to 1.05Gbps data rate for UXGA
    • On-chip DLL requires no external component
    Block Diagram -- LVDS Receiver PHY
  • LVDS transmitter PHY
    • Silicon Proven in 22,28,55,65,130n,180n from SMIC, Global Foundries and Samsung
    • Compatible with the National DS90CF386
    • Compatible with the TIA/EIA-644 standards
    • Converts 35 bits data to 5-pair LVDS data stream
    Block Diagram -- LVDS transmitter PHY
  • 1Kbyte Embedded EEPROM with configuration 64p8w16bit
    • SMIC EEPROM CMOS 0.18 um
    • 1Kbyte of available memory 16(bit per word) x 8(words per page) x 64(pages) bit
    Block Diagram -- 1Kbyte Embedded EEPROM with configuration 64p8w16bit
  • LVDS Transceiver
    • Meets or exceeds the TIA/EIA-644 LVDS standard.
    • Driver, Receiver, Bias, and Power cells included.
    • Greater than 400Mbs data rate.
    • 1.8V core voltage, 5V IO voltage.
    • Receive fault detection.
    • 0.3ns differential pulse skew.
    Block Diagram -- LVDS Transceiver
  • 1Kbyte EEPROM with configuration 64p8w16bit
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    • Programming and erase time – 2 ms (determined by specification of the EEPROM SMIC cell)
    Block Diagram -- 1Kbyte EEPROM with configuration 64p8w16bit
  • 1024-bit EEPROM IP with configuration 32p2w16bit
    • SMIC EEPROM CMOS 0.18 um
    • 1024-bite of available memory 16(bit per word) x 2(words per page) x 32(pages) bit
    • High density of memory cells
    Block Diagram -- 1024-bit EEPROM IP with configuration 32p2w16bit
  • 512-bit EEPROM with configuration 16p1w32bit
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    Block Diagram -- 512-bit EEPROM with configuration 16p1w32bit
  • 1Kbyte EEPROM (NTLab)
    • SMIC EEPROM CMOS 0.18 um
    • 1Kbyte of available memory 16(bit per word) x 8(words per page) x 64(pages) bit
    Block Diagram -- 1Kbyte EEPROM (NTLab)
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