Versatile 32-bit RISC processor with configurable 5/7-stage pipeline addressing a wide range of application requirements ranging from a tiny cache-less controller to a high-performance DSP engine
The Cadence® Tensilica® Xtensa® LX processor platform offers the most versatility by enabling configuration of several pre-defined processor elements and extending the architecture by creating entirely new instructions and hardware execution units as well as custom memory paths and data I/O paths. The Xtensa LX7 processor can be used for a wide range of applications by configuring it into a tiny controller, a high-performance DSP engine, or anything in between.
Tensilica Xtensa LX Processor Platform
Overview
Key Features
- Configurable 5/7-stage pipeline
- Configurable instruction and data caches and local memories
- Extensibility with application-specific instructions, execution units, register files, and I/Os
- Multiple bus interface options including Arm® AMBA® 3 and 4 AXI, ACE-Lite, PIF, AHB-Lite
- IEEE 754-compliant single-precision and double-precision floating-point unit
- Low-latency Integrated DMA (iDMA) Controller
- Memory protection option including Region Protection, Memory Protection Unit (MPU), Memory Management Unit (MMU)
- Enhanced Functional Safety features and documentation to support ISO 26262 compliance
- Industry-standard debug features like JTAG and multi-core debug support
Applications
- Automotive,
- Communications,
- Consumer Electronics,
- Data Processing,
- Industrial and Medical,
- Military/Civil Aerospace,
- Others
Technical Specifications
Maturity
Available on request