32-bit SPARC V8 processor
The LEON3 processor offers robust fault tolerance and performance for space and high-reliability applications, including satellit…
Overview
The LEON3 processor offers robust fault tolerance and performance for space and high-reliability applications, including satellites and scientific instruments.
The LEON3 is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable and particularly suitable for system-on-a-chip (SOC) designs.
LEON3 supports both asymmetric and symmetric multiprocessing (AMP/SMP). Up to 16 CPUs can be used in a multiprocessing configuration.
LEON3 is also available in a fault-tolerant version, the LEON3FT.
LEON3 has been certified by SPARC International as being SPARC V8 conformant. The certification was completed on May 1, 2005.
Key features
- SPARC V8 instruction set with V8e extensions
- Advanced 7-stage pipelineHardware multiply, divide and MAC units
- Hardware floating-point support
- Separate instruction and data cache (Harvard architecture) with snooping
- Configurable caches: 1 - 4 ways, 1 - 256 kbytes/way. Random, LRR or LRU replacement
- Local instruction and data scratchpad RAM, 1 - 512 Kbytes
- AMBA 2.0 AHB bus interface
- High Performance: 1.4 DMIPS/MHz, 1.8 CoreMark/MHz (gcc -4.1.2)
- Advanced on-chip debug support with instruction and data trace buffer
- SPARC Reference MMU (SRMMU) with configurable TLBSymmetric Multi-processor support (SMP)
- Power-down mode and clock gating
- Robust and fully synchronous single-edge clock design
- Up to 125 MHz in FPGA and 400 MHz on 0.13 um ASIC technologies
- Fault-tolerant and SEU-proof version available for space applications
- Extensively configurable
- Large range of software tools: compilers, kernels, simulators and debug monitors
Block Diagram
Benefits
- Low cost license fee
- Easily prototyped on low-cost FPGA boards
- SPARC V8 conformant
- High performance (400 MHz 0.13 ASIC, 100 MHz FPGA)
- Low area (30 - 50 Kgates, 5 - 10,000 LUTs)
What’s Included?
- Fully synthesisable VHDL code
- VHDL test bench
- Ducumentation
- Synthesis scripts
- Place&route scripts for FPGA boards
- GNU-based Cross-compiler
- High-performance behavioural simulator
- Technical support
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about CPU IP cores
What is 32-bit SPARC V8 processor?
32-bit SPARC V8 processor is a CPU IP core from Frontgrade Gaisler listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
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