LVDS I/O Pad Set
Overview
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates up to 2.4 Gbps. The pad set includes a full complement of power, spacer, and adapter cells to assemble a complete pad ring by abutment. An included rail splitter allows isolated LVDS domains to be placed in the same pad ring with other power domains while maintaining continuous VDD/VSS in the pad ring for robust ESD protection.
Key Features
- ? Operates up to 1.0GHz (2.0Gbps) with external 1 pF load
- ? Common mode output range 1.1V ±100mV
- ? Differential Skew between TXO_P and TXO_N 7ps
- ? High and low current drive modes to support 50? and
- 100? differential terminations
- ? Powered by 1.8V I/O and 0.9V core supplies
- ? Power consumption: 17.1 mW max
Deliverables
- a. Physical abstract in LEF format (.lef)
- b. Timing models in Synopsys Liberty formats (.lib and .db)
- c. Calibre compatible LVS netlist in CDL format (.cdl)
- d. GDSII stream (.gds)
- e. Behavioral Verilog (.v)
- f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- g. Databook (.pdf)
- h. Library User Guide - ESD Guidelines (.pdf)
Technical Specifications
Foundry, Node
TSMC 28nm
Maturity
Silicon Proven
Availability
Available Now
Related IPs
- LVDS IO Pad Set
- LVDS IO Pad Set
- 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- LVDS IO Pad Set
- LVDS I/O Pad Set
- LVDS I/O Pad Set