Vendor: Lattice Semiconductor Corp. Category: Single-Protocol PHY

2.5Gbps Ethernet PCS IP Core

The Lattice 2.5 Gbps Ethernet PCS IP core implements the state machine functions for the physical coding sublayer (PCS) described…

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Overview

The Lattice 2.5 Gbps Ethernet PCS IP core implements the state machine functions for the physical coding sublayer (PCS) described in the IEEE 802.3z (1000BaseX) specification. Note that the IEEE specification describes a PCS that operates at 1Gbps. Therefore, this 2.5G PCS IP core is non-standard with respect to the IEEE specification.

The two major non-compliances are data rate (2.5 Gbps instead of 1 Gbps) and GMII data bus width (16 bits instead of 8 bits).

This PCS IP core was specifically developed to operate with the Lattice 2.5 Gbps MAC IP core. The Lattice 2.5G PCS and MAC IP cores are 100% compatible and can be used to create a full PHY/MAC Ethernet data path that operates at 2.5 Gbps.

This document describes the 2.5 Gbps Ethernet PCS IP core’s operation, and provides instructions for generating the core through the Lattice IPexpress™ tool, and for instantiating, synthesizing, and simulating the core.

The 2.5 Gbps Ethernet PCS IP core converts GMII frames into 8-bit code groups in both transmit and receive directions and performs auto-negotiation with a link partner as described in IEEE 802.3z specification.

Key features

  • Implements the transmit, receive, and auto-negotiation functions of the IEEE 802.3z specification
  • 16-bit GMII interface operating at 156.25 MHz (2.5 Gbps)

Block Diagram

2PT5-PCS block diagram

Files

Product Sheet Download

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Specifications

Identity

Part Number
2PT5-PCS
Vendor
Lattice Semiconductor Corp.

Provider

Lattice Semiconductor Corp.
HQ: USA
Lattice Semiconductor Corporation provides the industry’s broadest range of Programmable Logic Devices ( PLD), including Field Programmable Gate Arrays ( FPGA), Complex Programmable Logic Devices ( CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.
Contact Lattice Semiconductor Corp.

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Frequently asked questions about Single-Protocol PHY IP

What is 2.5Gbps Ethernet PCS IP Core?

2.5Gbps Ethernet PCS IP Core is a Single-Protocol PHY IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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