1-bit 2-channel 2.2 MSPS (8.5 kHz BW) delta-sigma ADC

Overview

The cell is a second order delta-sigma dual channel (I/Q) analog-to-digital converter that supports sample rates up to 8.5 kHz and oversampling ratio 128. This structure is based on the principle of commutated capacitors and consists of two differential channels. Input signal bandwidth 0...8.5 kHz.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.

Key Features

iHP SGB25V
Small area
Low current consumption
Operating frequency range of 0 …8.5 kHz
Oversampling ratio 128
No external components required
Portable to other technologies (upon request)

Applications

Receivers, transmitters, transceivers
Analog integrated circuits

Deliverables

Schematic or NetList
Abstract model (.lef and .lib files)
Layout view (optional)
Behavioral model (Verilog)
Extracted view (optional)
GDSII
DRC, LVS, antenna report
Test bench with saved configurations (optional)
Documentation

Technical Specifications

Foundry, Node

iHP SiGe BiCMOS 0.25 um

Maturity

Silicon proven

Availability

Now

Request Info