12-bit 40nm 1.1V 64MHz-to-340MHz continuous-time Delta-Sigma ADC
Overview
The silicon-validated TRV103GFY40LP IP is a 1.1V low-power 12-bit 64MHz-to-340MHz continuous-time Delta-Sigma ADC with OSR of 32 and implemented in Global Foundry Low-Power 40nm CMOS process technology. Its scalable 1MHz to 5.3125MHz signal bandwidth makes it especially suitable for use in wireless and broadcast integrated circuit subsystems (LTE, WiMAX, DAB, DAB+, FM, HDFM, DRM, etc).
Key Features
- Integrated Dual-Channel Continuous-time Delta-Sigma Modulator (I + Q)
- Integrated Dual decimate-by-8 Cascaded-Integrator-Comb Decimation Filter
- Integrated Common-Mode Reference Generator
- Integrated Feedback DAC Positive and Negative Reference Generator
- Integrated Delta-Sigma Modulator Loop Filter RC Calibration Engine
- Scalable Power Consumption
- Two's Complement data output
- 65dB SNR
- 70dB SFDR
Benefits
- Low-power fully-featured 12-bit ADC with completely integrated reference generators and calibration engines.
Block Diagram
Applications
- ADC is suitable for embedding in ASIC and SoC subsystems for:
- LTE, WiMAX, DAB, DAB+, FM, HDFM, DRM and many more
Deliverables
- Behavioural Models
- Timing Models
- GDSII Layout Database
- Netlist for LVS verification
- Usage and Integration Guidelines
- Databook
Technical Specifications
Foundry, Node
Globalfoundries, 40nm CMOS
Maturity
Silicon validated
Availability
GDSII available now
GLOBALFOUNDRIES
Silicon Proven:
40nm
LP