12-Bit ADC IP

12-Bit ADC IP cores come in various speeds, use different interfaces, and provide differing degrees of accuracy. The most common types of ADCs are flash, successive approximation, and sigma-delta.

The vendors support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry and UMC.

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Compare 207 12-Bit ADC IP from 39 vendors (1 - 10)
  • Pipeline ADC
    • High Sampling Rate: Capable of sampling up to 125 million samples per second, suitable for high-speed applications
    • 8-bit Resolution: Provides 8-bit digital output, delivering precise quantization of input signals
    • Pipeline Architecture: Ensures low latency and high throughput, ideal for real-time processing
    • Low Power Consumption: Optimized for minimal power usage, enhancing energy efficiency in portable and battery-powered devices
    Block Diagram -- Pipeline ADC
  • SAR ADC
    • High Sampling Rate: Capable of sampling up to 640 million samples per second, making it suitable for ultra-high-speed applications
    • 12-bit Resolution: Delivers 12-bit digital output, providing superior precision and accuracy in signal quantization
    • SAR Architecture: Ensures high speed and low latency with excellent power efficiency
    • Ultra-Low Power Consumption: Optimized for minimal power usage, ideal for energy-sensitive applications
    Block Diagram -- SAR ADC
  • 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
    • Rail-to-Rail IQ ADC Input Capability
    • 65dB IQ ADC SNR
    • Programmable Full-Scale IQ DAC Output Current
    • 65dB IQ DAC SNR
    Block Diagram -- 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
  • 12-bit 40nm 1.1V 64MHz-to-340MHz continuous-time Delta-Sigma ADC
    • Integrated Dual-Channel Continuous-time Delta-Sigma Modulator (I + Q)
    • Integrated Dual decimate-by-8 Cascaded-Integrator-Comb Decimation Filter
    Block Diagram -- 12-bit 40nm 1.1V 64MHz-to-340MHz continuous-time Delta-Sigma ADC
  • 12-bit 40nm 1.1V 80MHz Asynchronous-SAR IQ ADC
    • Rail-to-Rail Input Capability
    • Dual (I and Q) Channels
    • Scalable Power Consumption
    • No need for external high-speed SAR clock
    Block Diagram -- 12-bit 40nm 1.1V 80MHz Asynchronous-SAR IQ ADC
  • 12-bit 40nm 1.1V 80MHz Asynchronous-SAR ADC
    • The TRV101TSM40LP IP is a 1.1V low-power low-silicon-area 12-bit 80MHz Asynchronous-SAR ADC implemented in TSMC Low-Power 40nm CMOS process technology.
    • Its 40MHz Nyquist bandwidth makes it especially suitable for use in carrier-aggregated wireless communication integrated circuit subsystems (LTE, WiFi, WiMAX etc).
    Block Diagram -- 12-bit 40nm 1.1V 80MHz Asynchronous-SAR ADC
  • 12 Bit 20 MS/s Pipeline ADC on XFAB XH035
    • This pipelined ADC can be applied for up to 20MSps sampling frequencies. By using interleaved switched-capacitor circuitries a CLK signal with half the sampling rate needs to be applied.
    • This ADC is built as a single-ended architecture and is designed to convert input signals from 0.5 – 2.3V at 3.3V supply voltage with up to 10 MHz input bandwidth with 12 bits resolution.
    Block Diagram -- 12 Bit 20 MS/s Pipeline ADC on XFAB XH035
  • 12 Bit 40 MS/s Pipeline ADC on XFAB XH018
    • Resolution: 12 bit
    • Conversion rate: 4 - 40 MS/s
    • Power consumption: 95 mW @ 1.8 V
    Block Diagram -- 12 Bit 40 MS/s Pipeline ADC on XFAB XH018
  • 12 Bit 54 kS/s Cyclic ADC on XFAB XH018
    • This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution for sampling frequencies up to 54 kS/s for continuous input signals.
    • This single ended ADC is designed to convert input signals with input swing of 1.9 V. The resolution is configurable (12 bit, 16 bit). Reference voltages can be generated on-chip or applied from outside.
    Block Diagram -- 12 Bit 54 kS/s Cyclic ADC on XFAB XH018
  • 12 Bit 17 kS/s Cyclic ADC on XFAB XH018
    • This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution for sampling frequencies up to 17 kS/s for continuous input signals.
    • This single ended ADC is designed to convert input signals with input swing of 1.9 V. The resolution is configurable (12 bit, 16 bit). Reference voltages can be generated on-chip or applied from outside.
    Block Diagram -- 12 Bit 17 kS/s Cyclic ADC on XFAB XH018
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